Traces, Current, Spacing and Clearance
Trace width for current, resistance and voltage drop, fusing, spacing for voltage, creepage and the rules to set.
Trace width for current
A copper trace carrying current heats itself by I²R and cools by conduction into the board and by convection. IPC-2221 gives the cross-section needed for a chosen temperature rise above ambient: for an external layer I = 0.048 × ΔT0.44 × A0.725 (A in square mils, I in amps); for an internal layer the constant is 0.024, because inner layers cool less well.
| Current | External 1 oz, +10 °C | External 1 oz, +20 °C | External 2 oz, +10 °C | Internal 1 oz, +10 °C |
|---|---|---|---|---|
| 0.5 A | 0.12 mm | 0.08 mm | 0.06 mm | 0.30 mm |
| 1.0 A | 0.30 mm | 0.20 mm | 0.15 mm | 0.78 mm |
| 2.0 A | 0.78 mm | 0.51 mm | 0.39 mm | 2.03 mm |
| 3.0 A | 1.37 mm | 0.90 mm | 0.68 mm | 3.56 mm |
| 5.0 A | 2.77 mm | 1.82 mm | 1.38 mm | 7.19 mm |
| 10.0 A | 7.19 mm | 4.72 mm | 3.60 mm | 18.71 mm |
The IPC-2221 curves are conservative for outer layers in air and optimistic for inner layers in thick boards: IPC-2152 gives more accurate values with the effect of nearby planes. Use the table as a guide, and the PCB Trace Width Calculator for other values.
- Choose 10 °C rise for general boards and 20 to 30 °C for rugged power boards; the rise is on top of the ambient temperature inside the enclosure.
- Use a pour (a plane or polygon) for high currents: a 5 mm wide pour is much better than a 5 mm trace because it spreads the heat.
- Short high-current traces run hotter at their ends only where the terminals are small; widen the pad connection too (thermal relief spokes limit the current: see Thermal Design on the Board).
- Avoid narrow necks where a wide trace passes between pads: the neck sets the current limit.
Resistance and voltage drop
Copper resistance is R = ρ L ÷ (w t) with ρ = 1.72×10−8 Ω·m at 20 °C and a temperature coefficient of 0.393 % per kelvin. A trace of one “square” (length equal to width) has a resistance of ρ ÷ t, independent of size.
| Copper weight | Thickness | Sheet resistance | Example |
|---|---|---|---|
| 0.5 oz | 17.5 µm | 0.98 mΩ/□ | 4.9 mΩ per mm at 0.2 mm wide |
| 1.0 oz | 35.0 µm | 0.49 mΩ/□ | 2.5 mΩ per mm at 0.2 mm wide |
| 2.0 oz | 70.0 µm | 0.25 mΩ/□ | 1.2 mΩ per mm at 0.2 mm wide |
| 3.0 oz | 105.0 µm | 0.16 mΩ/□ | 0.8 mΩ per mm at 0.2 mm wide |
Worked example: 2 A over 100 mm
- Width for 2 A and +10 °C (external, 1 oz): 0.78 mm (IPC-2221). Cross-section 0.027 mm².
- Resistance at 20 °C: 1.72×10−8 × 0.1 ÷ (0.78×10−3 × 35×10−6) = 63 mΩ. At the working temperature of 35 °C: ×(1 + 0.00393 × 15) = 67 mΩ.
- Voltage drop = 2 A × 67 mΩ = 133 mV: 2.7 % of a 5 V rail. Power in the trace = 0.27 W (2.7 mW per mm).
- Fine for a 5 V motor supply, but not for a 3.3 V logic rail where 2 % is only 66 mV.
Worked example: width to keep the drop under 2 %
- A 3.3 V rail may drop 2 %: 66 mV. At 1.0 A that allows R = 66 mΩ.
- For 80 mm of trace at 45 °C (R about 10 % above the 20 °C value, allowing for the rise) the width must be w = ρ L ÷ (R t) = 0.64 mm. That is wider than the thermal limit (0.30 mm), so the voltage drop, not the heating, sets the width.
- The lesson: for low voltages and long traces size by voltage drop; for short, high-current traces size by temperature.
Copper weight
Copper weight is given in ounces per square foot: 1 oz is 35 µm thick. Standard outer layers are 1 oz (0.5 oz base copper plus plating), standard inner layers 0.5 oz. Thicker copper (2 oz, 3 oz) carries more current but limits the minimum trace and space (a 2 oz board often needs 0.2 mm trace and space) and costs more.
Fusing and short pulses
A trace fuses (melts open) if the current heats the copper to its melting point faster than the heat can leave. For a short pulse the Onderdonk equation ignores the cooling and gives a conservative lower bound on the fusing current: I = A √(log10(1 + (Tm − Ta) ÷ (234 + Ta)) ÷ (33 s)), with A in circular mils and s the time in seconds.
| Width (1 oz) | Fuses in 1 s | in 10 s | in 10 ms |
|---|---|---|---|
| 0.15 mm | 1.5 A | 0.5 A | 15.2 A |
| 0.25 mm | 2.5 A | 0.8 A | 25.3 A |
| 0.50 mm | 5.1 A | 1.6 A | 50.5 A |
| 1.00 mm | 10.1 A | 3.2 A | 101.1 A |
The numbers are for an isolated trace in air; real traces carry somewhat more because they lose heat to the board, but a trace is a poor fuse: it can burn the board and its fusing current varies with the surroundings. Use a real fuse for protection.
Current in vias
Worked example: how many vias carry 5 A?
- A 0.3 mm via with 25 µm plating has a barrel cross-section of π × (0.3 + 0.025) × 0.025 = 0.026 mm² = 39.6 mil².
- IPC-2221 internal formula (k = 0.024, ΔT = 10 °C): I = 0.024 × 100.44 × 39.60.725 = 0.95 A per via.
- For 5 A use at least 6 vias; the common recommendation is to double that to share the current evenly (12). Each barrel adds a resistance of 1.1 mΩ and an inductance of 1.3 nH (see Routing, Vias and Return Paths).
Spacing for voltage
Clearance is the shortest distance through air between two conductors; creepage is the shortest distance along a surface. IPC-2221 gives minimum conductor spacing by peak voltage (between conductors, DC or AC peak) for different conditions. Internal layers are protected from dirt and moisture, so they can be closer than uncoated external ones.
| Voltage between conductors | Internal layers (B1) | External, uncoated, below 3 050 m (B2) |
|---|---|---|
| ≤ 15 V | 0.05 mm | 0.10 mm |
| ≤ 30 V | 0.05 mm | 0.10 mm |
| ≤ 50 V | 0.10 mm | 0.60 mm |
| ≤ 100 V | 0.10 mm | 0.60 mm |
| ≤ 150 V | 0.20 mm | 0.60 mm |
| ≤ 170 V | 0.20 mm | 1.25 mm |
| ≤ 250 V | 0.20 mm | 1.25 mm |
| ≤ 300 V | 0.20 mm | 1.25 mm |
| ≤ 500 V | 0.25 mm | 2.50 mm |
Worked example: a 48 V bus
- The peak voltage between conductors is 48 V (plus any transient: assume a 60 V peak). The row for up to 50 V gives 0.60 mm on an uncoated external layer and 0.10 mm on an internal layer.
- Practical rule: use 0.6 mm clearance on the outside for 48 V, and for anything with transients or dirt use 1 mm. A conformal coating allows closer spacing (the standard has a separate column for coated boards).
- Remember that ± rails count: ±24 V rails have 48 V between them.
Values are readings from IPC-2221 Table 6-1: check the table for your altitude, coating and product standard.
Mains and creepage
Boards connected to the mains must meet a product safety standard (IEC 62368-1, IEC 61010-1, UL 60950/62368), not just IPC-2221. The required distances come from the working voltage, the overvoltage category, the pollution degree and the material’s resistance to tracking (CTI).
Worked example: 230 V mains
- 230 V RMS has a peak of 325 V. With overvoltage category II (appliance on a socket) the impulse is 2.5 kV.
- Typical readings for IEC 60664-1 with pollution degree 2 and a standard FR-4 (CTI of 175 or more): basic insulation needs about 1.5 mm clearance and 2.5 mm creepage; reinforced insulation (between the mains and a touchable low-voltage part) about 3 mm clearance and 5 mm creepage (6 mm or more with margins).
- Cut a slot (1 mm or wider) in the board under the isolation barrier to add creepage where the board is narrow: a slot forces the surface path round it. Keep copper, vias and silkscreen out of the barrier.
These distances are typical readings, not a design rule: for a product you sell, work to the standard and have it tested. Never build mains boards without proper training and an isolating test set-up (see Electrical Safety).
Rules to set in the layout tool
Create net classes in your tool: each class has its own trace width, clearance and via size, so that the router and the design-rule check apply the right numbers. A starting set:
| Class | Width | Clearance | Via drill / pad |
|---|---|---|---|
| Signal | 0.20 mm | 0.20 mm | 0.3 / 0.6 mm |
| Power 1 A | 0.30 mm (+10 °C) | 0.20 mm | 0.3 / 0.6 mm |
| Power 3 A | 1.37 mm (+10 °C) | 0.25 mm | 2 to 4 vias per layer change |
| Mains (230 V) | by current | 2.5 to 3 mm (see text) | avoid vias; slot |
Troubleshooting
| Symptom | Likely cause | What to do |
|---|---|---|
| Trace is hot or discolors the board | Too narrow for the current | Widen it, use a pour, add copper on both layers |
| Rail sags under load | Voltage drop in long, thin traces | Widen, shorten, or use a plane |
| Arcing or tracking between traces | Spacing too small for the voltage, dirt | Increase spacing; clean; coat; slot the board |
| Via burns out | Too few vias for the current | Add vias (double the calculated number) |
| Fuse-like failure of a trace | Short-circuit current above fusing | Use a proper fuse or a current limit |
| DRC clean but board fails a safety test | IPC rules used instead of the product standard | Work to IEC 62368 / 61010; test creepage |
Related
- PCB Design and Layout: the overview of this guide.
- Power, Ground and Decoupling: power distribution and planes.
- Thermal Design on the Board: heat from the copper.
- PCB Trace Width Calculator.
FAQ
How wide should a PCB trace be for 1 A?
About 0.25 to 0.3 mm on an outer layer of 1 oz copper for a 10 °C rise by IPC-2221. Use more for margin and for voltage drop.
Why are inner traces wider for the same current?
They cool less well (they are surrounded by insulation), so IPC-2221 uses a constant half as large: roughly 2.5 times the width at the same temperature rise.
How far apart should traces be for 50 V?
IPC-2221 gives 0.6 mm for uncoated external layers and 0.1 mm on internal layers. Use more for safety and manufacturing yield.
How many vias for 5 A?
A 0.3 mm via carries about 1 A at a 10 °C rise: use 5 to 10 in parallel.
Can I use a trace as a fuse?
It can fuse, but not reliably: it depends on the surroundings and may burn the board. Use a real fuse.
References
- IPC-2221B, Generic Standard on Printed Board Design (conductor width, spacing); IPC-2152, Standard for Determining Current-Carrying Capacity in Printed Board Design.
- IEC 60664-1, Insulation coordination for equipment within low-voltage systems; IEC 62368-1.
- Onderdonk, I. M., “Fusing currents of wires” (in Preece and Onderdonk, 1920s); Brooks, D., PCB Trace Currents, UltraCAD.
Last reviewed: October 2026. The formulas are conservative estimates: use IPC-2152 or thermal tests for critical power boards, and the product standard for mains.